74HC132 74132 Quad 2 Input NAND Gate with Schmitt Trigger

Quad 2−Input NAND Gate with Schmitt−Trigger Inputs

Features:
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 uA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements as Defined by JEDEC Standard No. 7A
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 72 FETs or 18 Equivalent Gates
• These are Pb−Free Devices